Logic Synthesis and Verification Algorithms Book uri icon

Overview

abstract

  • Circuit designers and CAD tool developers alike will find Logic Synthesis and Verification Algorithms useful as an introductory and reference text. The rich collection of examples and solved problems make this book ideal for self study.

publication date

  • August 1, 2006

Full Author List

  • Hachtel GD; Somenzi F

Other Profiles

International Standard Book Number (ISBN) 13

  • 9780387310053