A performance model for hardware/software issues in computer-aided design of protocol systems Journal Article uri icon



  • Protocol execution can run into bottlenecks which are due to implementation decisions rather than to the protocol rules. The performance effects of processor saturation, buffer management strategy, allocation of functions between host and front-end, and hardware-software interactions due to special hardware attributes can, in principle, be predicted at the design stage by analytic performance models. The paper describes the process of construction of such a model for the data transfer stage of a simple transport protocol resembling an OSI class 4 protocol, including queueing for critical sections which protect the buffer pools and connection state information. The model is part of a computer-aided design process for communications systems, currently under development.

publication date

  • June 1, 1984

has restriction

  • closed

Date in CU Experts

  • June 23, 2014 11:57 AM

Full Author List

  • Woodside CM; Montealegre R; Buhr RJA

author count

  • 3

Other Profiles

International Standard Serial Number (ISSN)

  • 0146-4833

Additional Document Info

start page

  • 132

end page

  • 139


  • 14


  • 2